zmac updated to 26sep2010Just a quick note here to let you all know that there's a new version of zmac available. The only new part is some features to allow perfect cycle counting on the Model 4 when it is running at double speed (4 MHz).
You can get the new version and read the details on the zmac page.
Model 4 high speed mode makes things tricky because it adds 2 T-states to each opcode fetch. After measuring that timing difference (a tale in itself), I wondered why it added 2 extra states instead of just 1 or, for that matter, any at all? Well, most memory accesses on the Z-80 take 3 T-states. Like when it reads the value for a ld a,100 instruction or the memory location for ld b,(hl). Now, opcode fetches 4 T-states thus it seems like there's plenty of time. But whenever an opcode is fetched the Z-80 does another little bit of housekeeping in refreshing the system's dynamic RAMs. That refresh is tantamount to a memory access leaving only 2 T-states to fetch the opcode with the other 2 going to refresh memory. The Model 4's RAM needs a full 3 T-states to ensure proper operation. Therefore, both the opcode fetch and RAM refresh are stretched by a T-state leading to the 2 extra seen.
George Phillips, May 3, 2011, gp2000 -at- shaw.ca